Welcome![Sign In][Sign Up]
Location:
Search - spi vhdl

Search list

[Other resourceSPI接口音频Codec实验

Description: ALTERA NIOS处理器,VHDL语言在QUARTUS编译通过,然后有C语言在NIOS SHELL下驱动,实验音频解码-Altera NIOS processor, the QUARTUS VHDL compiler, then the C language under NIOS SHELL-driven, experimental audio decoder
Platform: | Size: 34889 | Author: xf | Hits:

[Other resourceSPI-PRT

Description: 昨天在论坛上看到有人帖出了他写的并串转换VHDL代码,但是他自己说有问题,但是不知道怎么改。我大概看了一下,发现思路还是比较乱的。于是就写下了我自己的并串转换代码。-yesterday at the forum see someone points out his writing and string conversion VHDL code, But he said there are problems, but does not know how reform. I probably watched and found ideas is quite a mess. So I wrote on their own code and string conversion.
Platform: | Size: 1013 | Author: ZHAOBOO | Hits:

[VHDL-FPGA-VerilogVHDLsample

Description: 英国诺森比亚大学的vhdl语言例程集锦,英文原版。 包含很多优秀的VHDL语言范例,可供学习。所有程序均可在符合IEEE标准的模拟器上模拟。-This file contains a selection of VHDL source files which serve to illustrate the diversity and power of the language when used to describe various types of hardware. The examples range from simple combinational logic, described in terms of basic logic gates, to more complex systems, such as a behavioural model of a microprocessor and associated memory. All of the examples can be simulated using any IEEE compliant VHDL simulator and many can be synthesised using current synthesis tools.
Platform: | Size: 172032 | Author: eensy | Hits:

[VHDL-FPGA-VerilogADController

Description: For Analog Device 7808/18/28 SPI Controller
Platform: | Size: 1024 | Author: zxm | Hits:

[VHDL-FPGA-Verilogsimple_spi

Description: complete spi core written in vhdl. its easy to use and can be configured to operate at various clock frequencies. tested on an ADC to verify the operation
Platform: | Size: 584704 | Author: Shahzad | Hits:

[VHDL-FPGA-Verilogad_test

Description: ad9777的测试程序,对SPI进行初始化,运用ISE环境,成功地进行综合和实现-ad9777 test procedures, the SPI is initialized, the use of ISE environment, the successful realization of comprehensive and
Platform: | Size: 2665472 | Author: 关明明 | Hits:

[VHDL-FPGA-VerilogSPI

Description: SPI总线通信模块,经测试验证通过的源码-SPI vhdl source code
Platform: | Size: 329728 | Author: victor | Hits:

[VHDL-FPGA-VerilogExp6_SPI_AD_DA

Description: 用VHDL在SOPC试验箱中实现DA_AD转换,用VHDL硬件描述语言实现处理器CPU-With VHDL SOPC test box in DA_AD realization, with VHDL language processor CPU hardware description
Platform: | Size: 12840960 | Author: jiajinying | Hits:

[VHDL-FPGA-Verilogcode

Description: spi接口 实现spi的传送 包括主从模式,时钟的建立。和数据的传送三部分-spi code very good for spi
Platform: | Size: 2048 | Author: 鲍鲍 | Hits:

[VHDL-FPGA-VerilogFlash_Ctrl

Description: 串行flash的写及擦除操作,串行flash,spi接口,支持并口输出-Serial flash write and erase operations, serial flash, spi interface, support for parallel port output
Platform: | Size: 1024 | Author: 王伯祥 | Hits:

[VHDL-FPGA-Verilogfm25h20

Description: spi接口,DSP发送数据,FPGA缓存起来,然后通过spi口写进fm25h20芯片里面-Spi interface, DSP send data, FPGA, and then through the spi cache up mouth written into fm25h20 chip inside
Platform: | Size: 5120 | Author: lg | Hits:

[VHDL-FPGA-VerilogFPGA_SPI_VHDL

Description: 串行外设接口(SPI)fpga 被动接收,在下降沿 采集数据并发送数据 1BYTE,要求mcu在末端采集数据。并在下降沿之前准备好数据。-Serial Peripheral Interface (SPI), The fpga passive receiving, at the falling edge of data collection the send data 1BYTE, mcu data collected at the end. And the data ready before the falling edge.
Platform: | Size: 8192 | Author: fxh | Hits:

[VHDL-FPGA-VerilogSPI_Core.ZIP

Description: SPI协议的VHDL/Verilog语言实现。-SPI agreement VHDL/Verilog language.
Platform: | Size: 13312 | Author: qjyong | Hits:

[VHDL-FPGA-Verilogspi

Description: SPI通讯协议 应用VHDL语言编写实验SPI通讯-SPI VHDL
Platform: | Size: 3072 | Author: bai | Hits:

[VHDL-FPGA-Verilogspi_mem_programmer-master

Description: spi_mem_programmer A simple verilog module for programming (Q)SPI flash memories
Platform: | Size: 9216 | Author: d.pershin | Hits:

[OtherSPI

Description: 使用VHDL写的SPI Master模块(Using the SPI Master module written in VHDL)
Platform: | Size: 2048 | Author: BY冬子 | Hits:

[VHDL-FPGA-VerilogFPGA与SPI接口程序(hdl源代码)

Description: FPGA,VERILOG,SPI串口通信;(FPGA,VERILOG,SPI;;;;;;;;;)
Platform: | Size: 2048 | Author: dl121 | Hits:

[VHDL-FPGA-Verilogspi_slave_test

Description: 实现spi协议的从机代码,亲测可用。按照字节接收,发送可以实现一次发送19字节,可按照需要更改。(The implementation of the code of the SPI slave protocol is available. By byte received, sending can be sent to send 19 bytes at a time, which can be changed as needed.)
Platform: | Size: 1008640 | Author: fantastic_guy | Hits:

[Otherspi

Description: 利用VHDL在FPGA内实现SPI总线的主从控制器设计(SPI Master and Slave Controller)
Platform: | Size: 638976 | Author: 今世闲人 | Hits:

[OtherAD9910-SPI-Interface-master (1)

Description: VHDL spi ad9910 for FTW
Platform: | Size: 2048 | Author: Tienld2 | Hits:
« 1 2 3 4 5 67 8 9 10 11 ... 15 »

CodeBus www.codebus.net